课程名称

开课时间

Days

培训对象

Description

Digital IC

Design and

Verification

2007/9/6~

2007/9/7

2

数字电路IC设计师

(2-3年工作经验)

An advanced topic for experienced IC designers, suitable for those who already have hands-on experience with FPGA or ASIC design with RTL coding and testbench verification.

Digital Standard Cell Library Development 

2007年底

2

数字电路IC 设计师, 模拟电路和射频IC设计师, IC版图设计师(2-3年工作经验)

An introductory course for IC designers and layout engineers. The complex SOC or ASIC design is composed of millions of standard cells, together with memory and IP blocks, to build up the top system-on-chip hierarchy. The generation of basic standard cell libraries is complex and becoming more challenging at nanometer nodes. In this short course, basic concepts such as schematic entry, circuit design, and the basic layout technology combining the process technology are discussed. The procedure of library generation, including, physical libraries and process anatenna effects, timing libraries, including power information and noise libraries for signal integrity analysis, will be demonstrated.

Physical Implementation of Digital IC

待定

3

数字电路IC设计师(2-3年工作经验)

An advanced topic for experienced IC designers in the physical implementation of ASIC design as a comparison with the FPGA alternative.  The design flows, similarities, and differences are compared.

Signal Integrity Analysis

待定

2

数字电路IC设计师(2-3年工作经验)

An advanced topic for experienced IC designers, especially with hands-on experience in implementing DSM and nanometer chip designs. The problem is at “post-layout” and, though the theory is not very complex, discovering it and to fixing it is the key to success in engineering world.